File:Full-Adder Propagation Delay.svg

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Description
English: A diagram of a Full adder, with the longest propagation delays from the inputs to the outputs marked.
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Author Inductiveload
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Public domain I, the copyright holder of this work, release this work into the public domain. This applies worldwide.
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inception

18 January 2009

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Date/TimeThumbnailDimensionsUserComment
current07:29, 14 May 2009Thumbnail for version as of 07:29, 14 May 2009400 × 225 (44 KB)Inductiveloadnew version showing all longest paths
20:25, 18 January 2009Thumbnail for version as of 20:25, 18 January 2009400 × 180 (30 KB)Inductiveload{{Information |Description={{en|1=A diagram of a en:Full adder, with the maximum length path (assuming all gate delays are identical) indicated in red. This is the path that is considered when calculating en:Propagation delay of the circuit.}}
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